摘 要
随着科技的发展，各种精密器械大规模地在各种工业场合应用，而各种精密仪器在开发研制当中，不能有任何噪声，但各种噪声又不可能避免，这就要求其必须在一个合理的范围内，这就引出了另一个问题，我们怎么样检测其在要求的合理范围内呢？传统的方法是通过检测、控制噪声信号，来达到精密度要求。模拟式的峰值检测电路不易做到高速采样。采样保持电路经长期使用后，多方面的性能会发生明显变化，且不易批量化生产，而由数字电路组成的系统可以做到结构简单、调试方便，长期使用不会导致系统性能指标的下降。
本文介绍了模拟峰值电压的检测方式,并重点叙述基于VHDL与高速A/D转换器相结合所实现的数字式快速噪声检测方法,给出相关的VHDL主模块部分,并介绍了该转换器与FPGA芯片的接口技术。通过此方法可以使取样保持电路很容易做到1:1的捕捉和保持较窄随机波形的最大正峰值。
关键词：峰值检测；传感器；VHDL；A/D转换器
Digital Peak Voltage Detection System
Abstract
With the development of science and technology, the various precise apparatus applies to various industry occasion on a large scale , the various precision instrument develops but middle in exploitation , can not have any noise, various noise avoids impossibly, this requires that the person must have drawn forth another problem , our right away in a rational range inner , this how to check the person within the rational range demanding right away? The tradition method is to pass detecting , controls noise signal, come to reach the accuracy request. The high speed no easy to achieve simulating the dyadic peak value detecting circuit takes sample. Sampling hold circuit uses the queen after the long range , may obvious change happened in the many-sided function , the structure at present no easy batches being spent giving birth to a child, but being composed of figure circuit systematically to be able to achieve simple , debugs to go to the lavatory, coming down that the long range uses to be able to not lead to the system function index
And way simulating peak value voltage detecting that the main body of a book has been introduced, priority description combines what be come true digital fleetness noise detecting method each other owing to VHDL and the high speed A/D converter, have given a pertinent VHDL host module out a part , have introduced and the interface technology owing converter and FPGA a chip. By the fact that this method can make the sampling keep circuit very easy to achieve, 1:1's catching and the maxima keeping narrower random wave form rectify peak value
Key Words：Peak value detecting；transducer；VHDL；A/D converter
设计内容及要求
1、 峰值电压检测系统的应用领域，设计方案。
2、 数字式峰值电压检测系统的实现方法。
3、 FPGA器件的结构和特点。
4、 QuartusⅡ软件的应用。
5、 硬件描述语言的程序设计。
6、 MAX120AD转化器的应用。
7、 给出数字式峰值电压检测系统的硬件连接图
目 录 18000字
摘 要. Ⅰ
Abstract II
引 言 ..................................................................1
1 论文研究的背景、目的和意义 .............................................3
1.1 研究的背景 .......................................................3
1.2 研究的目的和意义 .................................................3
2 峰值电压检测方案. ......................................................4
2.1 什么是峰值电压 ...................................................4
2.2 峰值电压的应用领域 ...............................................4
2.3 振动噪声的产生与检测 .............................................4
2.4 模拟式峰值电压采样保持电路.. .....................................5
2.5 数字式峰值电压检测 ...............................................6
3 硬件描述语言VHDL及QuartusⅡ简介 ......................................7
3.1 VHDL引言.........................................................7
3.2 VHDL语言简介.....................................................8
3.2.1 VHDL模型构成...............................................8
3.2.2 实体说明 ...................................................8
3.2.3 结构体 .....................................................9
3.2.4 子程序 ....................................................10
3.2.5 程序包和库 ................................................10
3.3 VHDL的主要特点..................................................11
3.4 QuartusⅡ简介..... ..............................................12
4 MAX120A/D转换器.......................................................14
4.1 MAX120A/D芯片的主要引脚及功能...................................14
4.1.1 MAX120A/D芯片的引脚及功能如下.............................14
4.1.2 引脚描述 ..................................................14
4.2 MAX120A/D的工作模式.............................................15
4.3 MAX120A/D的protel制作 ..........................................16
4.3.1 设置工作区参数及文档属性 ..................................16
4.3.2 绘制元件外形及引脚 ........................................17
4.3.3 设置元件的属性. ...........................................18
5 基于VHDL的峰值电压检测方案............................................21
5.1 逻辑功能的设计 ..................................................21
5.2 时序图 ..........................................................22
6 数字式峰值电压设计的FPGA实现..........................................24
6.1 FPGA芯片的选择及特点............................................24
6.1.1 FPGA的结构特点............................................24
6.1.2 FLEX EPF10K10-PLCC84芯片介绍..............................25
6.1.3 FPGA应用中的注意事项......................................27
6.2 数字式峰值电压设计的FPGA实现....................................28
6.2.1 FPGA内部总图..............................................28
6.3 通过QuartusⅡ实现的FPGA电路....................................28
6.3.1 分频电路DIV31250..........................................29
6.3.2 延时电路DLY07.............................................30
6.3.3 延时电路DLY1..............................................32
6.3.4 一秒门脉冲形成电路.......................... ..............34
6.3.5 一秒门脉冲形成波形图............................ ..........34
6.3.6 12位比较电路compare.......................................34
6.3.7 12位D触发器..............................................35
6.4 MAX120A/D转化器与FPGA(EPF10K10)的连接图.........................36
结 论 38
参考文献 .................................................................39
附 录 .................................................................40
致 谢 .................................................................46
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